<User>Language Programs</User>

User Language Programs(ULP)

Customize your EAGLE software with community-created programs.

mod-dup-place.ulp by BStarr

This ULP for v7.2 duplicates the placement of a hierarchical module given an x/y offset and source/destination module name instance. No routing duplication is supported, only the placement is duplicated. This is initial release of this ULP.

2027 Downloads | 569 Likes | 12.11.2014

alignd.ulp by hbridge99

alignD.ulp is a rework of align.ulp with a dialog box for easy text entry and option comparisons. Sadly, like the original, it only works on parts in boards.

2023 Downloads | 579 Likes | 04.17.2014

check-sch-against-lbr.ulp by admin

Check if the parts in the schematic are the same as in the corresponding libraries. Uses the Eagle\'s XML file format as data source. \r\nUploaded by Andrzej Telszewski from -

2013 Downloads | 435 Likes | 03.05.2012

generate_header.ulp by martonmiklos

ULP to generate net definitions for AVR GCC projects from the schematic.

2004 Downloads | 439 Likes | 08.24.2013

toggle-layer1.1.ulp by dcoryh192

v1.1 Update: Added smart mode option. Will only enable certain layers (tPlace, bStop, etc.) if the respective copper layer is already enabled. See description for more details and usage. Simple ULP to toggle layers. Intended to use with key shortcuts, but works fine in any application. Argument can be either layer name or number, or a mix of both. Only tested in Layout but should work in lib/lay/sch. No limit to number of arguments. Special CLI option to toggle all arguments the same direction or each individually.

2002 Downloads | 435 Likes | 07.30.2013

psscale4.ulp by admin

Update of PSSCALE 3. Not compatible with Eagle 5\r\nUploaded by Soeren Theodorsen from Unknown

2002 Downloads | 449 Likes | 03.07.2012

make-pogo-package2.ulp by BStarr

Latest version works with thru-hole and SMD test point pads. This ULP generates a script from an existing board that can be run in a library to create a device that represents the PCB with pogo pin holes that match the X/Y locations of SMD test points that contain the attribute \'POGOPIN\'. The SMD test points can be on the top or bottom side of the board and MUST also have an attribute of type \'POGOPIN\' defined for each test point that requires a hole location for mounting a pogo pin

1996 Downloads | 438 Likes | 04.12.2013

fpga_pinout.ulp by Barry

Generates FPGA setup files from an Eagle board design. Currently generates VHDL port list from the pins of a specified part. Also generates the pin mapping for a Lattice Semiconductor .lpf file. Results must be edited for signaling types, but automatically generates a correct net name - pin mapping. May be extended for Verilog or Xilinx/Altera.

1987 Downloads | 596 Likes | 10.19.2014

make_bga_v2.ulp by MartinHodges

Make_bga ulp modified to create double letter names for large bgas. Skips extra letters s, x and z.

1972 Downloads | 498 Likes | 12.16.2013

make-pogo-package.ulp by BStarr

This ULP generates a script from an existing board that can be run in a library to create a device that represents the PCB with pogo pin holes that match the X/Y locations of SMD test points that contain the attribute \'POGOPIN\'. The SMD test points can be on the top or bottom side of the board and MUST also have an attribute of type \'POGOPIN\' defined for each test point that requires a hole location for mounting a pogo pin

1968 Downloads | 469 Likes | 01.24.2013